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 Limerick(7) - Build/Run Hello World for FPGA Board 3/26/2023


Hello, everyone. Welcome to the seventh episode of FPGA limerick. In this episode, we will get our hands dirty, to build the Hello Word example in the previous episodes, and to load it onto a FPGA board for Blinking LED.

First of all, as we mentioned in the first episode, we will use the Arty A7-100T board from Digilent as our main FPGA development board. The board can be found in this link:



Tool Installation

And to build the Hello Word example, we need to do the following:

1. Install the Vivado

The Vivado can be downloaded from

We will use Vivado 2022.2 as our Vivado version. Please download and install it from Xilinx website. If you want to save disk space, you can only install 7 Series for devices. 


And Digilent also has some detailed instructions for installing the tools:


2. Install the Board File

In addition, Digilent has also provided a board file for the Arty A7-100T board, which can be found on GitHub



This board will be helpful if we do the design in IP integrator. And the instructions to install the board file under Vivado can also be found in


After the tool installation is completed, please add Vivado binary path (default is C:\Xilinx\Vivado\2022.2\bin) to the system path.


Build the Hello World

The Hello World can be built with the following steps:

1. Checkout the FpgaLimerick repo

git clone --depth 1 --branch v1.2.3 https://github.com/PulseRain/FpgaLimerick.git

2. Open a command prompt, enter the FpgaLimerick\HelloWorld\synth path, and run

And this script will do the following:

  1) Call SBT to configure and generate the verilog file. As we intended to create a HelloWorld that can blink the LED, the output clock frequency is set to be 3Hz.

  2) Create a Vivado project that contains the following:
      a) The core of the Hello World (NcoCounter.v)
      b) A MMCM that generates the clock (based on the 100MHz onboard oscillator)
      c) A xdc constraint file (under HelloWorld/synth/constraints)
      d) The top level wrapper (HelloWorld/srv/verilog/HelloWorld_ArtyA7_100T.sv)

  3) Build the project under Vivado command line
  4) Check the timing of the result


Program the FPGA board with the bit files.

Open Vivado 2022.2, and open hardware manager. The bit file(*.bit) is under 

HelloWorld\synth\HelloWorld_ArtyA7_100T\HelloWorld_ArtyA7_100T.runs\impl_1\ HelloWorld_ArtyA7_100T.bit

And if you want to program the flash on the board so that the bit file can be autoloaded, you can use the *.bin file

As for the SPI device on the FPGA board, please choose  s25fl128sxxxxxx0-spi-x1_x2_x4


    Posted by FPGA Limerick at March 26, 2023


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